The Open-Source PCB Workflow Stack

May 18, 2026

The Open-Source PCB Workflow Stack

Close-up of a green printed circuit board showing intricate copper traces and soldered components — representing the open-source PCB design pipeline

Most "EDA tool" lists stop at schematic capture. In practice, getting from design intent to a tested board involves twelve distinct stages — and broken tooling at any one of them kills your timeline. The good news: as of 2026, open-source software covers every single stage. Competently.

I built awesome-pcb-workflow to map that landscape. This post is the companion guide — a stage-by-stage walkthrough of the open-source tools that can replace, or complement, your existing OrCAD, Altium, or Cadence stack.

Key Takeaways

  • The PCB design software market hit $3.9B in 2024, growing at 11–17% annually (IMARC Group / GlobeNewswire, 2025–2026) — open-source is increasingly embedded in that growth.
  • Enterprise Cadence or Altium seats run $25,000–$50,000/yr per team. KiCad costs $0.
  • atopile (3,400 GitHub stars, May 2026) lets you write schematics in Python — a code-first paradigm largely absent from mainstream EDA content.
  • GitHub Actions + KiBot bring CI/CD discipline to hardware: automated DRC, ERC, and Gerber generation on every commit.

Does Open Source Actually Cover the Full Pipeline?

In 2026, the answer is yes — with caveats worth understanding. The PCB design software market was valued at $3.9 billion in 2024 and is projected to reach $11.3 billion by 2033 at an 11.81% CAGR (IMARC Group, PCB Design Software Market Size, Share & Forecast to 2033, March 2025). A separate GlobeNewswire report pegs a faster 17% CAGR through 2029, driven specifically by AI tooling, digital-twin integration, and hardware startups that can't absorb six-figure EDA contracts (GlobeNewswire, January 2026).

The PCEA Salary Survey (October 2025) puts KiCad weekly usage at 5% — but that sample skews heavily toward senior OEM designers at large companies, the cohort least likely to reach for open-source tools. Talk to any hardware startup, university EE department, or CERN lab and the picture shifts considerably. KiCad's 9.0 release drew 4,870 unique commits from hundreds of contributors worldwide, including over 2,309 library merge requests (KiCad Official Blog, Version 9.0.0 Released, February 2025). That's not a side project — it's a professionally maintained tool backed by a global engineering community.

The twelve-stage pipeline breaks into four natural clusters: Design Entry, Simulation & Verification, Fabrication Prep, and Test & Automation. Here's how open source handles each.

Design Entry: Schematics Without a License Fee

Open-source schematic capture is mature enough for production hardware. KiCad's schematic editor, Eeschema, supports hierarchical sheets, net classes, custom symbol libraries, and electrical rules checking (ERC). For teams working in Git, it stores everything as human-readable text — meaning diffs, pull requests, and code review apply to hardware the same way they apply to software.

KiCad V6 schematic editor showing component wiring and net connections for an open-source hardware project KiCad V6 Schematic Editor — Jon Neal / Wikimedia Commons / CC BY-SA 4.0

KiCad: The Foundation

KiCad covers everything OrCAD Capture does, plus outputs a netlist that feeds directly into PCBnew for layout. The official library ecosystem is extensive — thousands of symbols and footprints, community-maintained and updated with each release. CERN contributed a substantial component library update in May 2026, adding high-precision passive and connector footprints directly into the KiCad standard library.

For component sourcing, Octopart integrates with KiCad's BOM exporter. Real-time pricing, availability, and alternate part suggestions — no separate PLM subscription needed.

atopile: Schematics as Code

atopile is the more interesting development. It lets you write schematics in Python, with modules, inheritance, and version control as first-class concepts. A resistor divider is a reusable class. A power rail is a typed interface. The compiler generates KiCad-compatible netlists.

With 3,400 GitHub stars and 2,843 commits on its main branch as of May 2026 (GitHub, atopile/atopile), it's still early-stage. But it represents exactly where the field is heading. If you've ever copy-pasted a decoupling cap network across fifteen schematics and wished you hadn't, atopile is worth an afternoon.

Simulation: Replacing PSpice Without the Invoice

In 2025, a 10-designer enterprise PCB team spends roughly $50,000/yr on Cadence licenses and $25,000/yr on Altium subscriptions. Standard Altium Designer subscriptions run $3,850–$4,260 per seat per year (Quilter.ai, True Cost of Enterprise PCB Tools in 2025, 2025; PCBSync, Altium Designer Price 2026). KiCad plus ngspice costs nothing.

ngspice is the open-source successor to Berkeley SPICE. It handles transient, DC, AC, and noise analysis, supports BSIM4 MOSFET models, and accepts standard SPICE netlists. PySpice wraps ngspice in Python, so you can script parameter sweeps, plot results with matplotlib, and version-control your simulation setups like any other code.

For signal integrity and EMC work, openEMS provides full 3D electromagnetic field simulation — the kind of analysis that requires Ansys HFSS or CST Studio in a proprietary stack. FastHenry2 handles inductance and resistance extraction for multi-conductor systems. Neither requires a license.

The honest caveat: convergence issues that PSpice handles quietly can surface in ngspice. Model availability is narrower — manufacturer-supplied SPICE models are more consistently formatted for PSpice. For most analog and power designs the gap doesn't matter. For exotic RF or switching-power edge cases, expect some porting work.

Layout, Gerber, and DFM: Closing the Loop

KiCad V6 PCB editor showing a full board layout with copper pours, component placement, and routing KiCad V6 PCB Editor — Jon Neal / Wikimedia Commons / CC BY-SA 4.0

KiCad PCBnew covers layout. Interactive routing, length tuning, impedance-controlled traces, copper pours, and push-and-shove routing are all built in. FreeRouting adds autorouting for simpler boards via a KiCad plugin.

Once layout is done, KiKit handles panelization — mouse-bites, V-score, rails, fiducials — and GerbMerge merges multiple designs onto a single fab panel. These are tasks that previously required vendor-specific add-ons or manual Gerber editing.

For Gerber validation and DFM, kicad-gerbertools and gerber2pdf convert and check Gerber files. Most fab houses now publish their design rules as KiCad .kicad_dru files, so violations get caught locally before submission. The whole Gerber-to-fab handoff runs entirely in open-source tools.

According to open-source licensing terms, all of this is free even for commercial products. That's not a minor detail when you're running a hardware startup and tooling costs compete directly with prototype budget.

CI/CD for Hardware: Automated Checks on Every Commit

In 2025, 62% of developers use GitHub Actions for personal projects and 41% use it in organizational settings (JetBrains, State of CI/CD in 2025, October 2025, n = 805). Hardware teams are catching up to that pattern — and KiBot is what makes it practical.

KiBot is a KiCad output generator that runs headlessly in a Docker container. On every push, it can run:

  • ERC and DRC rule checking
  • BoM generation (CSV, HTML, XML)
  • Schematic PDF export
  • Gerber and drill file output
  • Interactive HTML BOM generation
  • Fabrication-ready ZIP packaging
# .github/workflows/kicad.yml
- name: Run KiBot
  uses: INTI-CMNB/KiBot@v2
  with:
    config: .kibot.yaml
    dir: output/

This is where the paradigm shift is most concrete. Hardware becomes reviewable the same way software is: open a pull request, checks run automatically, the reviewer sees the updated schematic PDF and BoM diff alongside any new DRC violations — before anything gets merged.

OpenHTF (Open Hardware Test Framework, originally from Google) handles automated physical testing after board bring-up. Test plans are written in Python, measurements are orchestrated and logged, and results can feed into manufacturing databases. It's the missing link between the CI/CD pipeline and the physical test station.

KiBot also generates InteractiveHtmlBom output — a clickable, filterable BOM that highlights each component on the PCB silkscreen. It's the kind of documentation that usually costs extra in proprietary tools. Here it's a one-line config entry.

AI Is Entering the EDA Stack

Hardware engineer at a workbench with an oscilloscope displaying signal waveforms next to a PCB under test Photo by Axel Richter / Unsplash

Flux.ai had over 1 million registered builders and 6.4 million projects on its platform as of May 2026, backed by $37M in funding raised in October 2023 (Flux.ai, platform stats and funding announcement). It exited private beta in June 2025. It's a browser-based collaborative EDA tool with AI-assisted component search and schematic completion — think code autocomplete, but for hardware.

rfic-gpt handles RF IC design assistance: inductor synthesis, matching network suggestions, LNA optimization. Niche, but directionally significant.

The honest read: AI in EDA is in its "GitHub Copilot circa 2021" phase. It saves time on routine tasks — part search, footprint matching, boilerplate symbol creation. For critical analog paths or high-speed differential pairs, you still need to know what you're doing. The AI doesn't replace engineering judgment; it reduces the friction on the tedious parts.

Frequently Asked Questions

Is KiCad production-ready for professional PCB design in 2026?

Yes, for the vast majority of applications. KiCad 9.0, built from 4,870 commits and hundreds of global contributors, handles multi-layer boards, controlled-impedance routing, high-speed differential pairs, and flex PCB design. CERN and numerous hardware startups use it in production workflows (KiCad Blog, February 2025).

How does ngspice compare to PSpice for circuit simulation?

ngspice runs the same Berkeley SPICE core as PSpice and handles transient, DC, AC, and noise analysis. The practical gap is in manufacturer-supplied model availability and convergence robustness for edge cases. For most analog and power designs, ngspice is fully sufficient. Complex RF or switching-power simulations may require model porting.

Can I use KiCad alongside my existing OrCAD workflow?

Yes — and that's often the best starting point. KiCad includes an OrCAD netlist importer, and many engineers run KiCad for simulation and DFM checking while keeping OrCAD for schematic entry. Full migration is possible but doesn't need to happen all at once.

What is atopile and is it ready for production use?

atopile is a Python-based schematic compiler that generates KiCad netlists. It treats circuit modules as typed, reusable software components. With 3,400 GitHub stars and active development, it's production-capable for teams with software engineering backgrounds. For pure-EE teams new to code-based workflows, KiCad's traditional schematic editor is the better starting point.

How does KiBot fit into a team's workflow?

KiBot runs in CI/CD to automate all output generation — DRC checks, Gerbers, BoM, interactive HTML BOM, and fab packaging — on every commit. It integrates with GitHub Actions, GitLab CI, and any Docker-capable pipeline. It's configured via a YAML file that lives alongside the KiCad project in the repo.

The Stack Is Complete. Start Using It.

Open-source PCB tooling isn't a cost-cutting compromise — it's a complete engineering stack running from Python-based schematic capture through automated CI/CD to physical board testing. The barrier is learning, not licensing.

Every tool mentioned in this post, with integration notes for KiCad and OrCAD and working GitHub Actions examples, is catalogued in one place:

github.com/piyushbag/awesome-pcb-workflow — PRs and stars welcome.

Sources: